Release Notes for Production Release 12.0 build 84 8/12/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Production Release 12.0 - Build 84 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 40 for A0-step, CPUID 650 Patch ID 40 for A1-step, CPUID 651 Patch ID 2A for B0-step, CPUID 652 Patch ID 10 for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 0C for B0-step, CPUID 672 Patch ID 0A for C0-step, CPUID 673 1. Based on Build 81 2. Rolled banner to Production Release 12.0 - Build 84 Release Notes for build 83 N/A ----------------------------------------------------------------------- Release Notes for build 82 N/A ----------------------------------------------------------------------- Release Notes for Beta 4.0 P12.0 build 81 7/28/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 4.0 P12.0 - Build 81 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 40 for A0-step, CPUID 650 Patch ID 40 for A1-step, CPUID 651 Patch ID 2A for B0-step, CPUID 652 Patch ID 10 for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 0C for B0-step, CPUID 672 Patch ID 0A for C0-step, CPUID 673 1. Rolled banner to Beta 4.0 P12.0 - Build 81 2. Added the following microcode updates; MU165310, MU16720C, MU16730A. 3. Updated quiet boot logo. Release Notes for Beta 3.0 P12.0 build 80 6/25/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 3.0 P12.0 - Build 80 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 40 for A0-step, CPUID 650 Patch ID 40 for A1-step, CPUID 651 Patch ID 2A for B0-step, CPUID 652 Patch ID 01 for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 0B for B0-step, CPUID 672 Patch ID 07 for C0-step, CPUID 673 1. Rolled banner to Beta 3.0 P12.0 - Build 80 2. Changed the Pentium(R) II processor .25u B1 microcode revision back to ID 01. 3. Corrected Post errors 0162 - 0165. The incorrect processor was being reported in the error messages. Release Notes for Beta 2.0 P12.0 build 78 6/14/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 2.0 P12.0 - Build 78 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 40 for A0-step, CPUID 650 Patch ID 40 for A1-step, CPUID 651 Patch ID 2A for B0-step, CPUID 652 Patch ID 0A for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 0B for B0-step, CPUID 672 Patch ID 07 for C0-step, CPUID 673 1. Rolled banner to Beta 2.0 P12.0 - Build 78 2. Added support for 600MHz Pentium(R) III processor. 3. Updated microcode for 650, 651, 652, 653, 672, 673. 4. Fixed problem where 8181 processor mismatch occurs when updated from BIOS 6.5 to Rel 10 or 11. Release Notes for Beta 1.0 P12.0 build 77 6/02/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 1.0 P12.0 - Build 77 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 32 for A0-step, CPUID 650 Patch ID 30 for A1-step, CPUID 651 Patch ID 14 for B0-step, CPUID 652 Patch ID 01 for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 04 for B0-step, CPUID 672 Patch ID 05 for C0-step, CPUID 673 1. Rolled banner to Beta 1.0 P12.0 - Build 77 2. DCS 17101 - Added fix for determining Top of system memory for WIN 2K installing with the full Gig of memory. Put the ACPI reclaim and NVS memory areas on 4K boundaries 3. DCS 13223, 13662, 16481 - Updated DMI settings and handlers. 4. DCS 16973 - Added DIMM sizing to the boot block. This new boot block will size the first row of memory instead of assuming 8MB. Some DIMMs don't work unless actually sized and the DRB is correct for the "front" row. Leveraged the DIMM sizing algorithm for normal BIOS to create a sizing algorithm for the first row in the system. It only sizes the "front" of the first populated DIMM slot. This is necessary because some DIMMs do not function unless the DRBs are "exactly" correct -- requiring sizing. 5. DCS 14572 - Added code to SERR handler, to check port 61 for SERR generated. Also changed handler to correctly exit the routine if Setup switch, SERR Reporting, is disabled. 6. DCS 17414 - Added support for large IDE drives - Setup displays the correct size. 7. DCS 17097 - Corrected a bug in the caching code which was causing a cache failure with dual 634 CPUs installed in the system. 8. DCS 15646 - Corrected ACPI entry for LPT. 9. DCS 17099 - Masked out EMP password in Setup with asterisks. Release Notes for Production Release 11.0 build 76 4/21/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Production Release 11.0 - Build 76 Processor Update Revisions: Pentium(R) II processor: Patch ID 34 for C0-step, CPUID 633 Patch ID 35 for C1-step, CPUID 634 Patch ID 32 for A0-step, CPUID 650 Patch ID 30 for A1-step, CPUID 651 Patch ID 14 for B0-step, CPUID 652 Patch ID 01 for B1-step, CPUID 653 Pentium(R) III processor: Patch ID 04 for B0-step, CPUID 672 Patch ID 05 for C0-step, CPUID 673 1. Rolled banner to Production Release 11.0 Release Notes for Beta 3.0 P11.0 build 75 4/20/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 3.0 P11.0 - Build 75 1. Rolled banner to Beta 3.0 P11.0 2. Added Microcode update for 673 - MU167305 Release Notes for Beta 2.0 P11.0 build 73 4/02/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 2.0 P11.0 - Build 73 1. Fixed support for 550MHz Pentium(R) III CPUs. 2. Rolled banner to Beta 2.0 P11.0 Release Notes for Beta 1.0 P11.0 build 72 3/26/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 1.0 P11.0 - Build 72 1. 12962 - Fixed Master boot record write protect feature in Setup. 2. Updated DMI Type 4 Structure, and CPU handler to support both Pentium II and Pentium III processors. 3. 16481 - Added Microcode patch for Pentium III C0 Stepping - 673. Updated CPU speed tables to include 550MHz. 4. Updated Symbios SCSI BIOS revision to 4.12.04 5. Updated Intel(R) and Pentium(R) copyrights and trademarks 6. 13668 - Changed IRQ9 to be level sensitive. Release Notes for Production Release 10.0 build 71 2/22/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Production Release 10.0 Build 71 1. Added string translations for PS# Setup options. 2. Corrected problem with EMP Access mode not being saved 3. Rolled Banner to Release 10.0 Release Notes for Beta 1.0 P10.0 build 70 2/16/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Beta 1.0 P10.0 BIOS Build 70 1. Fixed ISA option ROM shadowing 2. Added processor serial number enable/disable switch in new Setup submenu, CPU Settings. Release Notes for Production Release 9.0 build 69 1/20/99 ----------------------------------------------------------------------- Will Sign on as: N440BX Production Release 9.0 BIOS Build 69 1. Fixed L2 caching for all CPU IDs currently supported by Nightshade Release Notes for Production Release 8.0 build 68 Added string for Pentium III Release Notes for Production Release 8.0 build 67 Banner roll to Production Release 8.0 Release Notes for Production Release 7.0 RC 7.4 build 66 Back down SCSI to 4.11.03 to get rid of pause after CMOS clear Release Notes for Production Release 7.3 build 65 Check if PCI DMA Mode and set up DMA regs accordingly Release Notes for Release Candidate 7.2 build 64 1. added support for the PlugFest findings 2. get rid of EISADMA bangs in win98 Release Notes for Release Candidate 7 BIOS, build 62. 1. Add processor microcode update for CPUID 653. 2. Add caching and microcode update for Pentium(R) III processor .25u architecture. 3. DCS fixes for 15058, 15098, 15130, and 15164. 4. Removal of 8181h from getting logged (mismatched processors). Release Notes for Release Candidate 7 BIOS 1. Fixed SCSI nvram access of the flash component. 2. Fixed mouse text string display during POST. This text string would be displayed even when a mouse wasn't connected. 3. Added PCI SERR and PERR fields in Setup. 4. Added latest production microcode updates for processors: mu163334 mu163435 mu165032 mu165130 mu165214 5. Updated the ACPI tables that previously read "Nights" to "N440BX". 6. Fixed "String not found" when the ESCD clear setting was enabled in Setup. 7. Updated latest production processor microcode updates. 8. Updated SCSI BIOS revision to 12.01. This fixes the issue when two or more identical drives are installed, the multiboot option in Setup now displays each drive with its SCSI ID number so it can be uniquely identified. 9. Fixed problem with system dropping into ACPI mode when a DAC960 and a Symbios 8751 are installed. 10. Do not force fixed scan ordering. If order is enforced, then the first non-PnP PCI oprom that is found will cause all PnP PCI oproms after it in the scan order to be skipped. Disabling this feature allows the BIOS to make two full passes at the PCI oproms -- one for PnP, one for non-PnP. 11. Workaround for the 82558 LAN Controller. This code implements a workaround for the 82558 LAN controller when it fails to generate a valid link after a D3->D0 power transition. Usually this occurs under Windows 98 after a Shutdown/Restart or Shutdown/MS-DOS mode completes. The problem is in the PHY bandgap startup circuit. This code changes the link speed from 10Mb to 100Mb and back a number of times and then resets the PHY. This gets the bandgap circuit "unstuck" and the link is restored normally. 12. Added changes to clear SCSIB from flash when a manufacturing card is installed. Also increased the memory read/write bandwidths from 380MB/sec to 420MB/sec. 13. Fixed DMI GPNV table to allow the Symbios SCSI oprom to find NVRAM. NT cannot install to a SCSI drive if the oprom cannot get NVRAM from DMI. Release Notes for ACPI Beta 5 BIOS 10/5/98 1. Fixed serial redirection. Release Notes for ACPI Beta 4 BIOS 9/23/98 1. Add Setup Help text string stating that caution should be used if the processor(s) are overclocked. 2. Eventlogging failures fix. 3. Fix to correctly update the CMOS century byte during year 2000 rollover. 4. Removed "Disabled" in Setup secure mode menu. Disabled, loaded a count of 0 which caused the system to go into secure mode after ~ 8 hours. 5. "User" password access in Setup was changed to reduce access to Setup features. 6. Fixed several security features. 7. Bios Setup Help screen text change: The help screen for "Set Adminis- trative Password" referred to "Supervisor"; it was changed to "Administrator". 8. MP table contained "Nightshade" which was removed. 9. Entry into Setup's password menu had incorrect instructions; clarified functionality. 10. Fixed Win98 install hangs with ACPI enabled 11. Removed Floppy Check option in Setup. 12. Fixed DMI bios date field. ================================================================ Release Notes for ACPI Beta 3 BIOS 8/27/98 1. Fixed Win98 hangs during installation. 2. Fixed hang condition when serial redirection was enabled. 3. Fixed keyboard and mouse port swapping problems. 4. Removed S1 state if multiple processors are installed.